Samsung incorporates Shanghai-based EDA solution provider Xpeedic into its key EDA partner list

Editing by Xin Lanhua

The world's second-largest foundry, Samsung announced Shanghai-based Xpeedic as its EDA ecosystem partner at the SAFE 2021 Forum held in November.

The SAFE (Samsung Advanced Foundry Ecosystem) Forum addresses innovation in the advanced process field, using artificial intelligence and machine learning to design and adopt 2.5D/3D integration design. It sheds light on Samsung's technological future direction.

Source: Samsung SAFE2021 Forum Keynote

Founded in 2010, the Shanghai-based Xpeedic Semiconductor (芯和半导体) is a simulation-centric EDA solution provider. It has cooperation tie with Samsung for many years.

Jongwook Kye, vice president of Samsung Electronics' Design Enablement team, said, "As the design complexity at advanced process nodes continues to increase, accurate EM simulation has become critical to our customers. With the qualification of Xpeedic's 3D full-wave EM suite, our mutual customers will be able to create models and run EM simulations with confidence."

Dr. Ling Feng, CEO of Xpeedic Semiconductor, said, "We are delighted to be invited to participate in the Samsung SAFE 2021 Forum. Xpeedic will continue to take in-depth cooperation with Samsung on various process technologies to provide our mutual customers with innovative solutions and services."

According to Xpeedic's official website, in May 2021, Samsung Foundry certified Xpeedic's on-chip passive EM (electromagnetic) simulation suite on the advanced 8LPP (8nm Low Power Plus) process technology. The suite includes a fast 3D planar EM simulator IRIS and an automatic PDK modeling tool, iModeler. This certification enables IC design companies to accelerate their delivery of 8LPP designs.

Samsung's 8LPP process has further optimized in power, performance and area over its previous advanced FinFET nodes. It provides advantages for mobile, networking, server, automotive and cryptocurrency applications. It is regarded as one of the most attractive process nodes in many high-performance applications.

Xpeedic's IRIS and iModeler meet Samsung's 8LPP process requirement. Its iModeler, the fast PDK model generation platform, helps analog/RF engineers find optimal design solution and quickly realize it through advanced AI technology. For 2.5D/3D integration design, Xpeedic and Synopsys jointly released the world's first full-process EDA platform for 3DIC's advanced packaging, design, and analysis. It is a fully integrated single operating environment, which greatly improves the iteration speed of 3DIC design. This platform can simultaneously support the interconnection of hundreds of thousands of data channels between chips.